Substantial effort has been expended over the past decade to design control processes for switching power supply topologies that provide near-perfect power factor. The objective is to generate minimum waveform distortion of the input AC line voltage, and to feed back to the AC source a minimum of harmonics that are multiples of the AC line frequency.
An important early approach to this problem, disclosed by Willinson, et al. in U.S. Pat. No. 4,677,366 (Issued: Jun. 30, 1987), is to use a slow DC output voltage feedback loop (with a typical 5-15 Hz crossover frequency), combined with a fast average current loop (typically 7-10 kHz), to shape the input current waveform so that it follows the waveform of the AC line voltage. This process requires a multiply-and-divide operation in silicon, usually implemented as a "Gilbert multiplier," with its attendant intricacies and cost, as well as a means to sense the AC line voltage. An improvement to this control process, described by Farrington, et al., in U.S. Pat. No. 5,391,976 (Issued: Feb. 21, 1995), uses output power feed-forward to eliminate the principal effects of a slow output voltage loop, but a multiply-and-divide operation and AC line-sensing are still required.
U.S. Pat. No. 4,683,529, issued to Bucher on Jul. 28, 1987, describes an alternative to the foregoing approaches that avoids both the need for a multiply-and-divide operation and the need to sense the AC line voltage. The process described by Bucher operates a boost converter on the boundary between continuous and discontinuous conduction in the boost inductor (i.e., between continuous conduction mode "CCM" and discontinuous conduction mode "DCM"), which is detected and controlled by sensing the input voltage to the boost diode to determine the zeros of the inductor current. The result is more input ripple than is usually achieved with a typical CCM design, and variable switching frequency, both of which complicate achieving electro-magnetic interference ("EMI") compliance. The process, however, does advantageously avoid boost diode reverse recovery because the boost diode current is essentially zero when the active switch is turned on.
Other low cost control alternatives that do not use the multiply-and-divide operation have been proposed which can provide power factor of about 96% or better with only modest harmonic distortion. An example is the 364A rectifier, designed at Bell Laboratories in the late 1980's, which uses a boost front end that is controlled by peak-current control with a compensating ramp that is periodic at the switching frequency. The combined control signal is compared with the output of a voltage error amplifier, which has a 6-8 Hz loop response, to terminate the switch duty cycle. The duty cycle is initiated by a clock signal. By properly selecting the slope of the compensating ramp, a power factor of 98-99% can be achieved over a modest operating range of AC input voltage and load, but performance deteriorates at light load where DCM conditions prevail.
An article entitled, "Nonlinear-Carrier Control for High Power Factor Boost Rectifiers," by Maksimovic (Proceedings of APEC 1995, pp. 635-641), describes the development of a control process which does not require a multiply-and-divide operation or AC line-sensing; a periodic waveform is used with a period of the switching frequency and which consists of a repeating parabolic curve (a "non-linear carrier"). The waveform is compared with either the cycle-by-cycle integrated switch current or the peak switch current. The parameters of the parabolic waveform are controlled by the output voltage error amplifier. The switch duty cycle is initiated by a clock signal and is terminated when the switch current (average or peak) exceeds the repeating parabolic waveform. A key assumption in the author's derivation is that the boost inductor is in CCM, but the resulting input current waveform is "reasonably sinusoidal" for practical designs which necessarily include DCM near the zeros of the AC line voltage; thus, power factor performance degrades as the load current is reduced.
The foregoing control schemes assume CCM steady-state solutions without considering DCM operation, with the result that the input current distortion is increased at light load due to the DCM condition. In all of the foregoing schemes, both the sensed current signal and the control ramp are practically zero at light load, making the output of the controller extremely noise sensitive, and the converter very difficult to stabilize. The very low ramp slope at light load also increases the small-signal gain of the converter control loop, further complicating the control design.
In addition to the disadvantages of the above-described controllers, each converter topology requires a different controller design. Thus, it would be of value to unify the controller structures for all topologies so that the design complexity and cost of a PFC controller can be reduced.
Therefore, what is needed in the art is a simple, universal controller that can achieve high power factor and low current distortion in all operating conditions, including CCM and DCM.